EMC (electromagnetic compatibility) compliance is a mandatory threshold for electronics products to enter the market. The EU’s CE certification, the US FCC certification, and China’s CCC certification all require products to pass EMC testing. However, statistics show that over 60% of electronics products fail their first EMC test, mainly due to improper chip selection and PCB layout design flaws.
The root of EMC problems lies in the emission of electromagnetic interference (EMI) and the immunity to it (EMS). As the core noise source and sensitive receiver of the system, the chip’s selection directly determines the starting point and difficulty of EMC design. Choosing chips with excellent EMC characteristics can significantly reduce later rework costs and certification cycles.
First-ECM-Test Failure Rate of Electronics
Low-Freq Chip EMI Reduction
SSC Peak EMI Reduction
Principles for Selecting EMC-Friendly Chips
Clock frequency is the primary factor affecting EMI emission. Given functional requirements are met, choose chips with lower clock speeds whenever possible. For example, if an IoT terminal only needs 50MHz of processing capability, choosing a 50MHz MCU instead of a 200MHz MCU can reduce EMI emission by about 12dB.
Package type also significantly affects EMC performance. Due to short leads and large area, BGA packages offer better EMI suppression than QFP packages. A chip’s spread-spectrum clock (SSC) function is a powerful EMC tool, reducing peak EMI by 7-15dB; chips supporting SSC should be prioritized during selection.
The PSRR (power supply rejection ratio) and output noise of a power management IC are key parameters for EMS design. A high-PSRR LDO (>70dB@1kHz) can effectively suppress power-line interference from conducting to sensitive analog circuits. EMI filtering for DC-DC converters requires matching inductor and capacitor selection; X2Y capacitors are an efficient differential+common-mode integrated filtering solution.
| EMC Strategy | EMI Reduction | Applicable Scenario |
|---|---|---|
| Lower clock frequency | ~12dB | All digital chips |
| SSC spread-spectrum clock | 7-15dB | MCU/SoC main clock |
| BGA package | ~6dB vs QFP | High-pin-count chips |
| High-PSRR LDO | 70dB+ noise suppression | Analog/mixed-signal power |
| X2Y capacitor | Diff+common mode integrated | DC-DC output filtering |
Key EMC Rules for PCB Layout
Signal grouping and isolation is the primary principle of PCB EMC layout. High-speed signals (clock, DDR, USB) and sensitive signals (analog inputs, sensor interfaces) should be kept at maximum physical distance to avoid crosstalk coupling. Ground plane integrity is another core element – any signal trace must have a continuous ground reference plane beneath it, avoiding crossing ground plane splits.
The placement of decoupling capacitors is crucial. A 0.1muF ceramic capacitor should be placed near each IC’s VDD pin (distance <5mm), together with 1muF and 10muF bulk capacitors. The three-tier decoupling strategy (0.1muF + 1muF + 10muF) can effectively cover the noise band from 100MHz down to 10kHz.
EMC Protection for Interface Chips
External interfaces such as USB, HDMI, and Ethernet are the most error-prone parts of EMC testing. ESD protection chip selection needs to consider clamping voltage and response speed – the TVS diode’s clamping voltage should be lower than the interface chip’s maximum withstand voltage, and response time should be <1ns. Ethernet interfaces require common-mode chokes (CMC) and isolation transformers to achieve differential signal balance and common-mode noise suppression.
CAN bus interfaces face strict requirements in automotive electronics EMC certification. The ISO 11898-2 standard requires CAN transceivers to have EMI suppression and ESD protection capabilities; automotive-grade CAN transceivers such as TJA1050/TJA1043 have built-in EMC-optimized designs that significantly reduce the need for external protection components.
EMC compliance design is a systems engineering effort, and chip selection is the starting point, not the end. From clock frequency to package selection, from power PSRR to interface protection, every selection decision lays the groundwork for the final EMC test result. Honchak Electronics’ technical team can provide EMC selection consultation and rectification support to help customers shorten certification cycles.